since both the interface and mezzanine card are known entities. In addition, most FMC modules are supplied with HDL code, further simplifying the overall FPGA integration and verification process. Additionally, the PXIe module depicted


in — includes full PXI/PXIe functionality: • On-board programmable clock source for use as an FPGA timing reference or for FMC module support


• Access to the 10 MHz PXI clock and the 100 MHz PXIe clock


• Access to all PXI trigger and local bus signals


“Test engineers should look to adopting industry standards whenever pos- sible when considering the use of user-programmable FPGA instrumentation.” — Mike Dewey, Marvin Test Solutions


Programming and integration of the


PXIe FPGA module has also been simpli- fied by partitioning the user FPGA sepa- rate from the PCIe interface—eliminat- ing the need for the user to incorporate the PCIe interface as part of his or her overall FPGA design. Figure 5 details the overall architecture of the PXIe FPGA card, which employs this partitioning. As noted above, the user FPGA’s interface


to the PXIe bus is partitioned via an inter- nal address and data bus which is accessed via predefined registers and supported by the module’s software driver and an inter- active UI. Te result is a simplified design/ integration process since both the PXIe bus interface and associated software driver are known, tested entities. And as an added benefit, the compiled FGPA design can be loaded into on-board flash memory via this same interface, providing users with an easy way to incrementally design/test/modify their FPGA code. Today’s test engineers can choose


from a wide selection of user-program- mable FPGA modules for ATE systems, with many of these modules employing proprietary design tools and methods. However, test engineers should look to


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adopting industry standards whenever possible when considering the use of user-programmable FPGA instrumen- tation. By building on established stan- dards and standard interface modules such as VITA 57, the effort associated with the design, deployment and long- term maintenance of test systems that employ these user-programmable FPGA modules can be positively impacted.


Mike Dewey has been di- rector of marketing at Mar- vin Test Solutions since 2005. He is responsible for the strategic and tacti-


cal marketing and product management for Marvin Test’s commercial test products and systems for the Mil/aero, industrial, and semiconductor markets.


JANUARY 2019 EVALUATIONENGINEERING.COM 21


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